all: compile sim

compile: 
#	vcs tb_top.v mem_top.v -debug_all -full64 -kdb
	vcs tb_top.sv matmul_top.v mem_top.v -sverilog -debug_all -full64 -kdb
sim:
#	./simv -gui=dve

clean: 
	rm -r csrc DVEfiles simv.daidir *.vpd simv *.key novas* verdi* *.fsdb
